State-of-the art complementary metal oxide semiconductor (CMOS) devices employ fin field effect transistors (finFET). One of the design choices is whether raised active regions formed by selective epitaxy are to be merged with one another or remain unmerged. Each choice offers advantages and disadvantages. On one hand, fin field effect transistors including unmerged raised active regions benefit from lower contact resistance and improved direct current (DC) performance due to increased silicide contact areas corresponding to wrapping around of the silicides around the faceted surfaces of the unmerged raised active regions. On the other hand, fin field effect transistors including merged raised active regions benefit from reduced parasitic capacitance between a gate electrode and contact via structures due to the reduction in the number of contact via structures.
Another yield challenge with finFET devices is nickel silicide encroachment. If over-etching occurs nickel can encroach on silicon fins which results in short circuits and defective devices.
Thus, a method and a structure are desired for simultaneously reducing the occurrence of over-etching and nickel encroachment and thereby reducing the occurrence of defective devices.